diff options
| -rw-r--r-- | ble/src/main.rs | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/ble/src/main.rs b/ble/src/main.rs index 137c8a7..9468733 100644 --- a/ble/src/main.rs +++ b/ble/src/main.rs @@ -12,9 +12,9 @@ mod uarte1; use clint::HandlerArray; use core::mem; -use cortex_m::asm::wfi; +use cortex_m::{asm::wfi, peripheral::NVIC}; use cortex_m_rt::{entry, exception, ExceptionFrame}; -use log::{info, log, Level as LogLevel, LevelFilter}; +use log::{info, log, trace, Level as LogLevel, LevelFilter}; #[allow(unused_imports)] extern crate panic_semihosting; @@ -63,7 +63,6 @@ fn main() -> ! { nrf52.RTC0.intenset.write(|w| w.tick().set()); - let mut nvic = nrf52.NVIC; let mut rtc_handler = rtc::setup(Rtc::new(nrf52.RTC0), Clocks::new(nrf52.CLOCK)); let (mut twis_reader, mut twis_handler) = i2c::setup(Twis::new( I2C_ADDR, @@ -87,14 +86,16 @@ fn main() -> ! { HANDLERS.with_overrides(|hs| { hs.register(0, &mut rtc_handler); - nvic.enable(Interrupt::RTC0); hs.register(1, &mut twis_handler); - nvic.enable(Interrupt::SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); hs.register(2, &mut uarte1_handler); - nvic.enable(Interrupt::UARTE1); - nvic.enable(Interrupt::TIMER0); - nvic.enable(Interrupt::RADIO); + unsafe { + NVIC::unmask(Interrupt::RTC0); + NVIC::unmask(Interrupt::SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); + NVIC::unmask(Interrupt::UARTE1); + NVIC::unmask(Interrupt::TIMER0); + NVIC::unmask(Interrupt::RADIO); + } info!("Bootstrap complete."); @@ -127,6 +128,7 @@ fn main() -> ! { } if resp.has_work() { + trace!("ble responder has work"); resp.process_one().expect("ble response processing"); } wfi(); |