From b0e0946840155b506dfe175999bef735f45f0908 Mon Sep 17 00:00:00 2001 From: Brian Cully Date: Mon, 12 Aug 2019 12:56:19 -0400 Subject: Add UARTE1 instance. This will be to read from the trinket. --- ble/src/main.rs | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/ble/src/main.rs b/ble/src/main.rs index 0fed859..4430e98 100644 --- a/ble/src/main.rs +++ b/ble/src/main.rs @@ -8,6 +8,7 @@ mod macros; mod rtc; use clint::HandlerArray; +use core::fmt::Write; use core::mem; use cortex_m::asm::wfi; use cortex_m_rt::{entry, exception, ExceptionFrame}; @@ -18,7 +19,9 @@ extern crate panic_semihosting; use nrf52840_mdk_bsp::{ hal::{ + gpio::{Floating, Input, Level, Output, Pin, PushPull}, target::{interrupt, Interrupt, UARTE0}, + uarte::{self, Baudrate as UartBaudrate, Parity as UartParity, Uarte}, Clocks, Rtc, }, Board, @@ -47,6 +50,14 @@ fn main() -> ! { let mut nvic = nrf52.NVIC; let mut rtc_handler = rtc::setup(Rtc::new(nrf52.RTC0), Clocks::new(nrf52.CLOCK)); + let txp = nrf52 + .pins + .P0_26 + .into_push_pull_output(Level::High) + .degrade(); + let rxp = nrf52.pins.P0_25.into_floating_input().degrade(); + let mut uarte1 = uarte1(nrf52.UARTE1, txp, rxp); + HANDLERS.with_overrides(|hs| { hs.register(0, &mut rtc_handler); nvic.enable(Interrupt::RTC0); @@ -61,6 +72,7 @@ fn main() -> ! { last_tick = tick; last_tick -= last_tick % 1024; trace!("."); + write!(uarte1, "!").expect("uarte1 write"); } wfi(); } @@ -68,6 +80,23 @@ fn main() -> ! { unreachable!(); } +fn uarte1(uarte: U, tx: Pin>, rx: Pin>) -> Uarte +where + U: uarte::Instance, +{ + Uarte::new( + uarte, + uarte::Pins { + txd: tx.into_push_pull_output(Level::High), + rxd: rx.into_floating_input(), + cts: None, + rts: None, + }, + UartParity::EXCLUDED, + UartBaudrate::BAUD115200, + ) +} + #[exception] fn HardFault(ef: &ExceptionFrame) -> ! { log::logger().flush(); -- cgit v1.2.3