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-rw-r--r--usbh/src/pipe/addr.rs3
1 files changed, 1 insertions, 2 deletions
diff --git a/usbh/src/pipe/addr.rs b/usbh/src/pipe/addr.rs
index 98199d1..81cef5d 100644
--- a/usbh/src/pipe/addr.rs
+++ b/usbh/src/pipe/addr.rs
@@ -89,8 +89,7 @@ impl<'a> AddrW<'a> {
pub unsafe fn bits(self, v: u32) -> &'a mut W {
// Address must be 32-bit aligned. cf ยง32.8.7.2 of SAMD21 data
// sheet.
-
- //assert!((v & 0x3) == 0);
+ assert!((v & 0x3) == 0);
self.w.bits = v;
self.w
}