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author | Brian Cully <bjc@kublai.com> | 2022-10-27 16:19:47 -0400 |
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committer | Brian Cully <bjc@kublai.com> | 2022-10-27 16:19:47 -0400 |
commit | 0df0ba556ef16c43255095ee7be91891bb417ad4 (patch) | |
tree | 0b485e9d5df36e8a6413d6b3a52b3770bd69f313 /src/cirque.rs | |
parent | d636107975ff00a0990eb257d2354b757d073be4 (diff) | |
download | luchie-0df0ba556ef16c43255095ee7be91891bb417ad4.tar.gz luchie-0df0ba556ef16c43255095ee7be91891bb417ad4.zip |
cirque: use rapaddress enum instead of hardcoded values
Diffstat (limited to 'src/cirque.rs')
-rw-r--r-- | src/cirque.rs | 29 |
1 files changed, 13 insertions, 16 deletions
diff --git a/src/cirque.rs b/src/cirque.rs index 99de287..4a2686b 100644 --- a/src/cirque.rs +++ b/src/cirque.rs @@ -164,23 +164,20 @@ where self.cs_pin.set_high().ok(); self.clear_flags(spi)?; - // SysConfig - self.wr(spi, 0x03, 0x00)?; - // FeedConfig2 - self.wr(spi, 0x05, 0x1f)?; - // FeedConfig1 - self.wr(spi, 0x04, 0x03)?; - // ZIdleCount - self.wr(spi, 0x0a, 0x05)?; + self.wr(spi, RAPAddress::SysConfig1, 0x02)?; + self.wr(spi, RAPAddress::FeedConfig2, 0x1f)?; + self.wr(spi, RAPAddress::FeedConfig1, 0x03)?; + self.wr(spi, RAPAddress::ZIdle, 0x05)?; Ok(()) } + // clears the hardware data ready flag fn clear_flags<S>(&mut self, spi: &mut S) -> nb::Result<(), S::Error> where S: spi::FullDuplex<u8>, { - self.wr(spi, 0x02, 0x00)?; + self.wr(spi, RAPAddress::Status1, 0x00)?; cortex_m::asm::delay(50 * self.sysclk_speed / 1_000_000); @@ -203,7 +200,7 @@ where S: spi::FullDuplex<u8>, { let mut buf: [u8; 6] = [0xfc; 6]; - self.rd(spi, 0x12, &mut buf)?; + self.rd(spi, RAPAddress::PacketByte0, &mut buf)?; self.clear_flags(spi)?; let x = buf[2] as u16 | ((buf[4] as u16 & 0x0f) << 8); @@ -224,27 +221,27 @@ where }) } - fn rd<S>(&mut self, spi: &mut S, cmd: u8, buf: &mut [u8]) -> nb::Result<(), S::Error> + fn rd<S>(&mut self, spi: &mut S, addr: RAPAddress, buf: &mut [u8]) -> nb::Result<(), S::Error> where S: spi::FullDuplex<u8>, { - let cmd = cmd | READ_MASK; + let addr = addr as u8 | READ_MASK; self.cs_pin.set_low().ok(); let res = spi - .write(&[cmd, 0xfc, 0xfc]) + .write(&[addr, 0xfc, 0xfc]) .and_then(|_| spi.transfer(buf)); self.cs_pin.set_high().ok(); res } - fn wr<S>(&mut self, spi: &mut S, addr: u8, data: u8) -> nb::Result<(), S::Error> + fn wr<S>(&mut self, spi: &mut S, addr: RAPAddress, data: u8) -> nb::Result<(), S::Error> where S: spi::FullDuplex<u8>, { - let cmd = addr | WRITE_MASK; + let addr = addr as u8 | WRITE_MASK; self.cs_pin.set_low().ok(); - let res = spi.write(&[cmd, data]); + let res = spi.write(&[addr, data]); self.cs_pin.set_high().ok(); res |