diff options
author | Brian Cully <bjc@kublai.com> | 2019-07-25 09:40:31 -0400 |
---|---|---|
committer | Brian Cully <bjc@kublai.com> | 2019-07-25 10:14:46 -0400 |
commit | 7966be1419d3eaa088ed83f95282383182585640 (patch) | |
tree | 3b7b09eb768d47e327035301f53f3bd23b7596f2 | |
parent | 5b48a5c2f5526f088187fa341f64368994c9f517 (diff) | |
download | samd21-demo-7966be1419d3eaa088ed83f95282383182585640.tar.gz samd21-demo-7966be1419d3eaa088ed83f95282383182585640.zip |
Move USB host stuff to separate crate.
-rw-r--r-- | app/Cargo.lock | 13 | ||||
-rw-r--r-- | app/Cargo.toml | 5 | ||||
-rw-r--r-- | app/src/logger.rs | 2 | ||||
-rwxr-xr-x | app/src/main.rs | 7 | ||||
-rw-r--r-- | usbh/Cargo.lock | 269 | ||||
-rw-r--r-- | usbh/Cargo.toml | 15 | ||||
-rwxr-xr-x[-rw-r--r--] | usbh/src/lib.rs (renamed from app/src/usb.rs) | 53 | ||||
-rw-r--r-- | usbh/src/pipe.rs (renamed from app/src/usb/pipe.rs) | 33 | ||||
-rw-r--r-- | usbh/src/pipe/addr.rs (renamed from app/src/usb/pipe/addr.rs) | 0 | ||||
-rw-r--r-- | usbh/src/pipe/ctrl_pipe.rs (renamed from app/src/usb/pipe/ctrl_pipe.rs) | 0 | ||||
-rw-r--r-- | usbh/src/pipe/ext_reg.rs (renamed from app/src/usb/pipe/ext_reg.rs) | 0 | ||||
-rw-r--r-- | usbh/src/pipe/pck_size.rs (renamed from app/src/usb/pipe/pck_size.rs) | 0 | ||||
-rw-r--r-- | usbh/src/pipe/status_bk.rs (renamed from app/src/usb/pipe/status_bk.rs) | 0 | ||||
-rw-r--r-- | usbh/src/pipe/status_pipe.rs (renamed from app/src/usb/pipe/status_pipe.rs) | 0 | ||||
-rw-r--r-- | usbh/src/usbproto.rs (renamed from app/src/usb/usbproto.rs) | 0 |
15 files changed, 358 insertions, 39 deletions
diff --git a/app/Cargo.lock b/app/Cargo.lock index 6cabc74..92a66e8 100644 --- a/app/Cargo.lock +++ b/app/Cargo.lock @@ -262,7 +262,7 @@ dependencies = [ "smart-leds 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)", "smart-leds-trait 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)", "trinket_m0 0.3.0", - "vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)", + "usbh 0.1.0", ] [[package]] @@ -331,6 +331,17 @@ version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" [[package]] +name = "usbh" +version = "0.1.0" +dependencies = [ + "atsamd-hal 0.5.0", + "embedded-hal 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)", + "log 0.4.7 (registry+https://github.com/rust-lang/crates.io-index)", + "rb 0.1.0", + "vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)", +] + +[[package]] name = "vcell" version = "0.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" diff --git a/app/Cargo.toml b/app/Cargo.toml index d73dad3..98e0642 100644 --- a/app/Cargo.toml +++ b/app/Cargo.toml @@ -7,6 +7,9 @@ readme = "../README.md" license = "GPL-3.0-or-later" [dependencies] +rb = { path = "../rb" } +usbh = { path = "../usbh" } + trinket_m0 = { path = "../../atsamd/boards/trinket_m0" } panic-halt = "~0.2" smart-leds = "~0.2" @@ -19,8 +22,6 @@ embedded-hal = "~0.2" clint = { path = "../../clint" } #cortex-m-semihosting = "~0.3" bare-metal = "~0.2" -rb = { path = "../rb" } -vcell = "~0.1" log = "~0.4" [features] diff --git a/app/src/logger.rs b/app/src/logger.rs index 7e90572..140eebe 100644 --- a/app/src/logger.rs +++ b/app/src/logger.rs @@ -1,5 +1,3 @@ -use crate::logln_now; - use rb::{Reader, RingBuffer, Writer}; use core::cell::UnsafeCell; diff --git a/app/src/main.rs b/app/src/main.rs index b9f626e..792f339 100755 --- a/app/src/main.rs +++ b/app/src/main.rs @@ -8,7 +8,6 @@ mod dotstar; mod logger; mod macros; mod rtc; -mod usb; //#[allow(unused)] //use panic_halt; @@ -17,7 +16,7 @@ use clint::HandlerArray; use cortex_m::asm::wfi; use cortex_m_rt::{entry, exception, ExceptionFrame}; use embedded_hal::digital::v2::OutputPin; -use log::{error, info, LevelFilter}; +use log::{info, LevelFilter}; use smart_leds::colors; use smart_leds_trait::SmartLedsWrite; use trinket_m0::{ @@ -29,6 +28,7 @@ use trinket_m0::{ time::*, CorePeripherals, Peripherals, }; +use usbh::USBHost; static HANDLERS: HandlerArray = HandlerArray::new(); @@ -98,7 +98,7 @@ fn main() -> ! { let mut rtc_handler = rtc::setup(peripherals.RTC, &mut clocks); info!("setting up usb host"); - let (mut usb_host, mut usb_handler) = usb::USBHost::new( + let (mut usb_host, mut usb_handler) = USBHost::new( peripherals.USB, pins.usb_sof, pins.usb_dm, @@ -107,6 +107,7 @@ fn main() -> ! { &mut pins.port, &mut clocks, &mut peripherals.PM, + &rtc::millis, ); info!("setting up handlers"); diff --git a/usbh/Cargo.lock b/usbh/Cargo.lock new file mode 100644 index 0000000..5b973da --- /dev/null +++ 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"usbh" +version = "0.1.0" +authors = ["Brian Cully <bjc@kublai.com>"] +edition = "2018" + +[dependencies] +rb = { path = "../rb" } +atsamd-hal = { path = "../../atsamd/hal" } +embedded-hal = "~0.2" +log = "~0.4" +vcell = "~0.1" + +[features] +default = ["atsamd-hal/samd21e18a"] diff --git a/app/src/usb.rs b/usbh/src/lib.rs index a5788a1..4e6b8bf 100644..100755 --- a/app/src/usb.rs +++ b/usbh/src/lib.rs @@ -1,3 +1,5 @@ +#![no_std] + mod pipe; mod usbproto; @@ -5,16 +7,14 @@ use pipe::{DataBuf, PipeErr, PipeTable, USBPipeType, USBToken}; use rb::{Reader, RingBuffer, Writer}; use usbproto::*; -use crate::rtc; - -use embedded_hal::digital::v2::OutputPin; -use log::{info, warn}; -use trinket_m0::{ +use atsamd_hal::{ calibration::{usb_transn_cal, usb_transp_cal, usb_trim_cal}, clock::{ClockGenId, ClockSource, GenericClockController}, gpio::{self, Floating, Input, OpenDrain, Output}, - PM, USB, + target_device::{PM, USB}, }; +use embedded_hal::digital::v2::OutputPin; +use log::{info, warn}; #[derive(Clone, Copy, Debug, PartialEq)] pub enum Event { @@ -110,7 +110,10 @@ impl USBDeviceAddress { } } -pub struct USBHost { +pub struct USBHost<F> +where + F: Fn() -> usize + 'static, +{ usb: USB, events: EventReader, @@ -126,9 +129,15 @@ pub struct USBHost { _dm_pad: gpio::Pa24<gpio::PfG>, _dp_pad: gpio::Pa25<gpio::PfG>, host_enable_pin: Option<gpio::Pa28<Output<OpenDrain>>>, + + // To get current milliseconds. + millis: &'static F, } -impl USBHost { +impl<F> USBHost<F> +where + F: Fn() -> usize + 'static, +{ pub fn new( usb: USB, sof_pin: gpio::Pa23<Input<Floating>>, @@ -138,6 +147,7 @@ impl USBHost { port: &mut gpio::Port, clocks: &mut GenericClockController, pm: &mut PM, + millis: &'static F, ) -> (Self, impl FnMut()) { let (eventr, mut eventw) = unsafe { EVENTS.split() }; let mut rc = Self { @@ -151,6 +161,8 @@ impl USBHost { _dm_pad: dm_pin.into_function_g(port), _dp_pad: dp_pin.into_function_g(port), host_enable_pin: None, + + millis: millis, }; if let Some(he_pin) = host_enable_pin { @@ -245,7 +257,7 @@ impl USBHost { } Event::Attached => { if let TaskState::Detached(_) = self.task_state { - self.delay = rtc::millis() + SETTLE_DELAY; + self.delay = (self.millis)() + SETTLE_DELAY; TaskState::Attached(AttachedState::WaitForSettle) } else { self.task_state @@ -282,7 +294,7 @@ impl USBHost { // } // Event::Attached => { // if let TaskState::Detached(_) = self.task_state { - // self.delay = rtc::millis() + SETTLE_DELAY; + // self.delay = self.millis() + SETTLE_DELAY; // TaskState::Attached(AttachedState::WaitForSettle) // } else { // self.task_state @@ -333,7 +345,7 @@ impl USBHost { fn attached_fsm(&mut self, s: AttachedState) { match s { AttachedState::WaitForSettle => { - if rtc::millis() >= self.delay { + if (self.millis)() >= self.delay { self.usb.host().ctrlb.modify(|_, w| w.busreset().set_bit()); self.task_state = TaskState::Attached(AttachedState::WaitResetComplete); } @@ -351,7 +363,7 @@ impl USBHost { // immediately after reset according to §32.6.3.3. self.usb.host().ctrlb.modify(|_, w| w.sofe().set_bit()); // USB spec requires 20ms of SOF after bus reset. - self.delay = rtc::millis() + 20; + self.delay = (self.millis)() + 20; self.task_state = TaskState::Attached(AttachedState::WaitSOF); } } @@ -359,7 +371,7 @@ impl USBHost { AttachedState::WaitSOF => { if self.usb.host().intflag.read().hsof().bit_is_set() { self.usb.host().intflag.write(|w| w.hsof().set_bit()); - if rtc::millis() >= self.delay { + if (self.millis)() >= self.delay { self.task_state = TaskState::Steady(SteadyState::Configuring); } } @@ -423,8 +435,8 @@ impl USBHost { )?; info!(" -- address set"); // Delay according to §9.2.6.3 of USB 2.0 - let until = rtc::millis() + 300; - while rtc::millis() < until {} + let until = (self.millis)() + 300; + while (self.millis)() < until {} info!("getting config"); let tmp: USBConfigurationDescriptor = Default::default(); @@ -490,7 +502,12 @@ impl USBHost { }, }; let mut pipe = self.pipe_table.pipe_for(self.usb.host_mut(), addr, ep); - pipe.send(USBToken::Setup, &DataBuf::from(&setup_packet), NAK_LIMIT)?; + pipe.send( + USBToken::Setup, + &DataBuf::from(&setup_packet), + NAK_LIMIT, + self.millis, + )?; /* * Data stage. @@ -499,7 +516,7 @@ impl USBHost { match bm_request_type.direction() { USBSetupDirection::DeviceToHost => { info!("buf0: {:?}", &b); - pipe.in_transfer(&b, NAK_LIMIT)?; + pipe.in_transfer(&b, NAK_LIMIT, self.millis)?; info!("buf1: {:?}", &b); } @@ -529,7 +546,7 @@ impl USBHost { // TODO: should probably make `pipe.send` have optional // `DataBuf`, rather than exposing `dispatch_retries`. info!("dispatching status stage"); - pipe.dispatch_retries(token, NAK_LIMIT)?; + pipe.dispatch_retries(token, NAK_LIMIT, self.millis)?; Ok(()) } diff --git a/app/src/usb/pipe.rs b/usbh/src/pipe.rs index 2efb29b..75923ba 100644 --- a/app/src/usb/pipe.rs +++ b/usbh/src/pipe.rs @@ -12,15 +12,10 @@ use pck_size::PckSize; use status_bk::StatusBk; use status_pipe::StatusPipe; -use crate::rtc; - use core::convert::TryInto; use log::info; -// FIXME: this stuff is needed for PipeRegs, and while tied to samd, -// it shouldn't be tied to trinket_m0. Will need to figure out a -// better layout for this. -use trinket_m0::usb::{ +use atsamd_hal::target_device::usb::{ self, host::{BINTERVAL, PCFG, PINTFLAG, PSTATUS, PSTATUSCLR, PSTATUSSET}, }; @@ -97,6 +92,7 @@ impl Pipe<'_, '_> { token: USBToken, buf: &DataBuf, nak_limit: usize, + millis: &dyn Fn() -> usize, ) -> Result<(), PipeErr> { // Data needs to be word aligned. assert!((buf.ptr as u32) & 0x3 == 0); @@ -120,10 +116,15 @@ impl Pipe<'_, '_> { //unsafe { w.multi_packet_size().bits(0) } }); - self.dispatch_retries(token, nak_limit) + self.dispatch_retries(token, nak_limit, millis) } - pub(crate) fn in_transfer(&mut self, buf: &DataBuf, nak_limit: usize) -> Result<(), PipeErr> { + pub(crate) fn in_transfer( + &mut self, + buf: &DataBuf, + nak_limit: usize, + millis: &dyn Fn() -> usize, + ) -> Result<(), PipeErr> { // Data needs to be word aligned. assert!((buf.ptr as u32) & 0x3 == 0); // byte_count section of register is 14 bits. @@ -152,27 +153,28 @@ impl Pipe<'_, '_> { // w.bits(1) //}); - self.dispatch_retries(USBToken::In, nak_limit) + self.dispatch_retries(USBToken::In, nak_limit, millis) } pub(crate) fn dispatch_retries( &mut self, token: USBToken, retries: usize, + millis: &dyn Fn() -> usize, ) -> Result<(), PipeErr> { assert!(retries > 0); info!("initial regs"); self.log_regs(); - let until = rtc::millis() + USB_TIMEOUT; + let until = millis() + USB_TIMEOUT; let mut last_result: Result<(), PipeErr> = Err(PipeErr::SWTimeout); let mut naks = 0; while naks <= retries { info!("p{}: dispatch {:?} retry {}", self.num, token, naks); self.dispatch_packet(token); - last_result = self.dispatch_result(token, until); + last_result = self.dispatch_result(token, until, millis); match last_result { Ok(_) => return Ok(()), // FIXME: handle datatoggle @@ -238,8 +240,13 @@ impl Pipe<'_, '_> { self.regs.statusclr.write(|w| w.pfreeze().set_bit()); } - fn dispatch_result(&mut self, token: USBToken, until: usize) -> Result<(), PipeErr> { - while rtc::millis() <= until { + fn dispatch_result( + &mut self, + token: USBToken, + until: usize, + millis: &dyn Fn() -> usize, + ) -> Result<(), PipeErr> { + while millis() <= until { if self.is_transfer_complete(token)? { return Ok(()); } else if self.regs.intflag.read().stall().bit_is_set() { diff --git a/app/src/usb/pipe/addr.rs b/usbh/src/pipe/addr.rs index 8b92177..8b92177 100644 --- a/app/src/usb/pipe/addr.rs +++ b/usbh/src/pipe/addr.rs diff --git a/app/src/usb/pipe/ctrl_pipe.rs b/usbh/src/pipe/ctrl_pipe.rs index 63390df..63390df 100644 --- a/app/src/usb/pipe/ctrl_pipe.rs +++ b/usbh/src/pipe/ctrl_pipe.rs diff --git a/app/src/usb/pipe/ext_reg.rs b/usbh/src/pipe/ext_reg.rs index 023ce9f..023ce9f 100644 --- a/app/src/usb/pipe/ext_reg.rs +++ b/usbh/src/pipe/ext_reg.rs diff --git a/app/src/usb/pipe/pck_size.rs b/usbh/src/pipe/pck_size.rs index 5133005..5133005 100644 --- a/app/src/usb/pipe/pck_size.rs +++ b/usbh/src/pipe/pck_size.rs diff --git a/app/src/usb/pipe/status_bk.rs b/usbh/src/pipe/status_bk.rs index 4ddb420..4ddb420 100644 --- a/app/src/usb/pipe/status_bk.rs +++ b/usbh/src/pipe/status_bk.rs diff --git a/app/src/usb/pipe/status_pipe.rs b/usbh/src/pipe/status_pipe.rs index 4f8eb41..4f8eb41 100644 --- a/app/src/usb/pipe/status_pipe.rs +++ b/usbh/src/pipe/status_pipe.rs diff --git a/app/src/usb/usbproto.rs b/usbh/src/usbproto.rs index 9c1dbcb..9c1dbcb 100644 --- a/app/src/usb/usbproto.rs +++ b/usbh/src/usbproto.rs |