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-rw-r--r--usbh/src/pipe.rs4
1 files changed, 4 insertions, 0 deletions
diff --git a/usbh/src/pipe.rs b/usbh/src/pipe.rs
index 4910c3e..e17bec5 100644
--- a/usbh/src/pipe.rs
+++ b/usbh/src/pipe.rs
@@ -36,6 +36,7 @@ pub(crate) enum PipeErr {
InvalidToken,
Stall,
TransferFail,
+ PipeErr,
Flow,
HWTimeout,
DataToggle,
@@ -356,6 +357,9 @@ impl Pipe<'_, '_> {
} else if self.regs.intflag.read().trfail().bit_is_set() {
self.regs.intflag.write(|w| w.trfail().set_bit());
Err(PipeErr::TransferFail)
+ } else if self.regs.intflag.read().perr().bit_is_set() {
+ self.regs.intflag.write(|w| w.perr().set_bit());
+ Err(PipeErr::PipeErr)
} else if self.desc.bank0.status_bk.read().errorflow().bit_is_set() {
self.desc
.bank0