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-rw-r--r--usbh/src/device.rs29
-rwxr-xr-xusbh/src/lib.rs6
-rw-r--r--usbh/src/pipe.rs45
3 files changed, 38 insertions, 42 deletions
diff --git a/usbh/src/device.rs b/usbh/src/device.rs
index f300aa4..eeaa33b 100644
--- a/usbh/src/device.rs
+++ b/usbh/src/device.rs
@@ -1,4 +1,4 @@
-use super::pipe::{DataBuf, Pipe, PipeErr, PipeTable};
+use super::pipe::{Pipe, PipeErr, PipeTable};
use super::usbproto::*;
use core::convert::TryInto;
@@ -145,7 +145,7 @@ impl Device {
RequestCode::GetDescriptor,
WValue::from((0, DescriptorType::Device as u8)),
0,
- Some(DataBuf::from(&mut vol_descr)),
+ Some(&mut vol_descr),
self.millis,
)?;
@@ -167,7 +167,7 @@ impl Device {
RequestCode::GetDescriptor,
WValue::from((0, DescriptorType::Configuration as u8)),
0,
- Some(DataBuf::from(&mut vol_descr)),
+ Some(&mut vol_descr),
self.millis,
)?;
let desc = vol_descr.get();
@@ -182,7 +182,7 @@ impl Device {
RequestCode::GetDescriptor,
WValue::from((0, DescriptorType::Configuration as u8)),
0,
- Some(DataBuf::from(&mut tmp)),
+ Some(&mut tmp),
self.millis,
)?;
@@ -199,7 +199,7 @@ impl Device {
RequestCode::SetConfiguration,
WValue::from((conf, 0)),
0,
- None,
+ Option::<&mut ()>::None,
self.millis,
)?;
debug!(" -- configuration set");
@@ -207,14 +207,14 @@ impl Device {
debug!("+++ setting idle");
pipe.control_req(
RequestType::from((
- USBSetupDirection::HostToDevice,
- USBSetupType::Class,
- USBSetupRecipient::Interface,
+ RequestDirection::HostToDevice,
+ RequestKind::Class,
+ RequestRecipient::Interface,
)),
RequestCode::GetInterface, // This is also idle, but can't have two enums with the same value.
WValue::from((0, 0)),
0,
- None,
+ Option::<&mut ()>::None,
self.millis,
)?;
debug!(" -- idle set");
@@ -223,14 +223,14 @@ impl Device {
let mut rep_res: u8 = 0;
pipe.control_req(
RequestType::from((
- USBSetupDirection::HostToDevice,
- USBSetupType::Class,
- USBSetupRecipient::Interface,
+ RequestDirection::HostToDevice,
+ RequestKind::Class,
+ RequestRecipient::Interface,
)),
RequestCode::SetConfiguration,
WValue::from((0, 2)),
0,
- Some(DataBuf::from(&mut rep_res)),
+ Some(&mut rep_res),
self.millis,
)?;
debug!(" -- report set: {}", rep_res);
@@ -264,8 +264,7 @@ impl Device {
fn read_report(&mut self, pipe: &mut Pipe, id: u8) {
let mut buf: core::mem::MaybeUninit<[u8; 64]> = core::mem::MaybeUninit::uninit();
- let mut db = DataBuf::from(&mut buf);
- match pipe.in_transfer(&mut db, 15, self.millis) {
+ match pipe.in_transfer(&mut buf, 15, self.millis) {
Ok(bytes_received) => {
let tmp = unsafe { &(buf.assume_init())[..bytes_received] };
info!("report {}: {:?}", id, tmp);
diff --git a/usbh/src/lib.rs b/usbh/src/lib.rs
index 4bad707..94230b2 100755
--- a/usbh/src/lib.rs
+++ b/usbh/src/lib.rs
@@ -6,7 +6,7 @@ mod pipe;
mod usbproto;
use device::DeviceTable;
-use pipe::{DataBuf, PipeErr, PipeTable, USBPipeType};
+use pipe::{PipeErr, PipeTable, USBPipeType};
use rb::{Reader, RingBuffer, Writer};
use usbproto::*;
@@ -365,7 +365,7 @@ where
RequestCode::GetDescriptor,
WValue::from((0, DescriptorType::Device as u8)),
0,
- Some(DataBuf::from(&mut vol_descr)),
+ Some(&mut vol_descr),
self.millis,
)?;
@@ -383,7 +383,7 @@ where
RequestCode::SetAddress,
WValue::from((device.addr, 0)),
0,
- None,
+ Option::<&mut ()>::None,
self.millis,
)?;
diff --git a/usbh/src/pipe.rs b/usbh/src/pipe.rs
index beac863..56acc00 100644
--- a/usbh/src/pipe.rs
+++ b/usbh/src/pipe.rs
@@ -96,23 +96,23 @@ pub(crate) struct Pipe<'a, 'b> {
pub(crate) desc: &'a mut PipeDesc,
}
impl Pipe<'_, '_> {
- pub(crate) fn control_req(
+ pub(crate) fn control_req<T>(
&mut self,
bm_request_type: RequestType,
b_request: RequestCode,
w_value: WValue,
w_index: u16,
- buf: Option<DataBuf>,
+ buf: Option<&mut T>,
millis: &dyn Fn() -> usize,
) -> Result<(), PipeErr> {
- if let Some(ref b) = buf {
- assert!(b.ptr as usize & 0x3 == 0);
- assert!(b.len <= 65_535);
- }
-
// Pipe data toggles for control pipes defined in SAMD21 data
// sheet §32.6.3.9
+ let len = match buf {
+ None => 0,
+ _ => core::mem::size_of::<T>(),
+ };
+
/*
* Setup stage.
*/
@@ -121,10 +121,7 @@ impl Pipe<'_, '_> {
b_request: b_request,
w_value: w_value,
w_index: w_index,
- w_length: match buf {
- None => 0,
- Some(ref b) => b.len as u16,
- },
+ w_length: len as u16,
};
self.dtgl_clear();
self.send(
@@ -143,13 +140,11 @@ impl Pipe<'_, '_> {
// per-packet chunks) to complete. cf §9.2.6.4 of USB 2.0.
match bm_request_type.direction()? {
RequestDirection::DeviceToHost => {
- trace!("buf0: {:?}", &b);
- self.in_transfer(&b, NAK_LIMIT, millis)?;
- trace!("buf1: {:?}", &b);
+ self.in_transfer(b, NAK_LIMIT, millis)?;
}
RequestDirection::HostToDevice => {
- debug!("Should OUT for {}b", b.len);
+ debug!("Should OUT for {}b", len);
}
}
}
@@ -204,18 +199,20 @@ impl Pipe<'_, '_> {
self.dispatch_retries(token, nak_limit, millis)
}
- pub(crate) fn in_transfer(
+ pub(crate) fn in_transfer<T>(
&mut self,
- buf: &DataBuf,
+ buf: &mut T,
nak_limit: usize,
millis: &dyn Fn() -> usize,
) -> Result<(usize), PipeErr> {
// TODO: pull this from pipe descriptor for this addr/ep.
let packet_size = 8;
- trace!("p{}: Should IN for {}b.", self.num, buf.len);
+ let db: DataBuf = buf.into();
+
+ trace!("p{}: Should IN for {}b.", self.num, db.len);
self.desc.bank0.pcksize.write(|w| {
- unsafe { w.byte_count().bits(buf.len as u16) };
+ unsafe { w.byte_count().bits(db.len as u16) };
unsafe { w.multi_packet_size().bits(0) }
});
@@ -223,18 +220,18 @@ impl Pipe<'_, '_> {
// nothing left for us in this transaction) or the buffer is
// full.
let mut bytes_received = 0;
- while bytes_received < buf.len {
+ while bytes_received < db.len {
// Move the buffer pointer forward as we get data.
self.desc
.bank0
.addr
- .write(|w| unsafe { w.addr().bits(buf.ptr as u32 + bytes_received as u32) });
+ .write(|w| unsafe { w.addr().bits(db.ptr as u32 + bytes_received as u32) });
self.regs.statusclr.write(|w| w.bk0rdy().set_bit());
self.dispatch_retries(USBToken::In, nak_limit, millis)?;
let recvd = self.desc.bank0.pcksize.read().byte_count().bits() as usize;
bytes_received += recvd;
- trace!("!! read {} of {}", bytes_received, buf.len);
+ trace!("!! read {} of {}", bytes_received, db.len);
if recvd < packet_size {
// If we receive a short packet, we should be done
// here. It /may/ be possible to get a short packet
@@ -245,12 +242,12 @@ impl Pipe<'_, '_> {
}
// Don't allow writing past the buffer.
- assert!(bytes_received <= buf.len);
+ assert!(bytes_received <= db.len);
}
//self.dtgl();
self.regs.statusset.write(|w| w.pfreeze().set_bit());
- if bytes_received < buf.len {
+ if bytes_received < db.len {
self.log_regs();
// TODO: honestly, this is probably a panic condition,
// since whatever's in DataBuf.ptr is totally
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 03:45:08 +0000