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authorBrian Cully <bjc@kublai.com>2019-08-04 15:33:03 -0400
committerBrian Cully <bjc@kublai.com>2019-08-04 19:58:34 -0400
commite02128bd4d9d2716b55be5db3dccb18f92f01e9c (patch)
tree8f74b58be72a31a257f11022454fc186060193a3 /examples
downloadatsamd-usb-host-e02128bd4d9d2716b55be5db3dccb18f92f01e9c.tar.gz
atsamd-usb-host-e02128bd4d9d2716b55be5db3dccb18f92f01e9c.zip
Initial commit
Diffstat (limited to 'examples')
-rw-r--r--examples/simple/logger.rs139
-rw-r--r--examples/simple/macros.rs15
-rwxr-xr-xexamples/simple/main.rs192
-rw-r--r--examples/simple/rtc.rs74
4 files changed, 420 insertions, 0 deletions
diff --git a/examples/simple/logger.rs b/examples/simple/logger.rs
new file mode 100644
index 0000000..9641dac
--- /dev/null
+++ b/examples/simple/logger.rs
@@ -0,0 +1,139 @@
+use crate::rtc;
+use starb::{Reader, RingBuffer, Writer};
+
+use core::cell::UnsafeCell;
+use core::fmt::{self, Write};
+use embedded_hal::{digital::v2::OutputPin, serial};
+use log::{Metadata, Record};
+use trinket_m0::{
+ gpio::{Pa6, Pa7, PfD},
+ sercom::{Sercom0Pad2, Sercom0Pad3, UART0},
+};
+
+static mut UART0: usize = 0;
+
+struct JoinedRingBuffer<'a> {
+ lbr: Reader<'a, u8>,
+ lbw: Writer<'a, u8>,
+}
+
+impl<'a> JoinedRingBuffer<'a> {
+ const fn new(rb: &'a RingBuffer<u8>) -> Self {
+ let (lbr, lbw) = rb.split();
+ Self { lbr: lbr, lbw: lbw }
+ }
+}
+
+impl fmt::Write for JoinedRingBuffer<'_> {
+ fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
+ for b in s.bytes() {
+ if let Err(_) = self.lbw.unshift(b) {
+ // Ignore buffer full errors for logging.
+ return Ok(());
+ }
+ }
+ Ok(())
+ }
+}
+
+static mut LB: RingBuffer<u8> = RingBuffer::<u8>::new(0);
+static mut JRB: JoinedRingBuffer = unsafe { JoinedRingBuffer::new(&LB) };
+
+// The UART isn't necessarily Sync, so wrap it in something that
+// is. As long as flush() is only called from one thread, we're fine,
+// but this is a guarantee that the logger module doesn't make.
+pub struct WriteWrapper<W> {
+ w: W,
+}
+impl<W> WriteWrapper<W>
+where
+ W: serial::Write<u8>,
+{
+ pub const fn new(writer: W) -> Self {
+ Self { w: writer }
+ }
+}
+unsafe impl<W> Sync for WriteWrapper<W> {}
+
+pub struct SerialLogger<W, L> {
+ writer: UnsafeCell<WriteWrapper<W>>,
+ led: UnsafeCell<L>,
+}
+
+impl<W, L> SerialLogger<W, L>
+where
+ W: serial::Write<u8>,
+ L: OutputPin + Send + Sync,
+{
+ pub fn new(writer: WriteWrapper<W>, led: L) -> Self {
+ // Stash this for unsafe usage in case there's an issue with
+ // the rest of the logging.
+ unsafe { UART0 = core::mem::transmute(&writer.w) };
+ Self {
+ writer: UnsafeCell::new(writer),
+ led: UnsafeCell::new(led),
+ }
+ }
+}
+unsafe impl<W, L> Send for SerialLogger<W, L> {}
+unsafe impl<W, L> Sync for SerialLogger<W, L> {}
+
+impl<W, L> log::Log for SerialLogger<W, L>
+where
+ W: serial::Write<u8>,
+ L: OutputPin + Send + Sync,
+{
+ fn enabled(&self, metadata: &Metadata) -> bool {
+ metadata.level() <= log::max_level()
+ }
+
+ fn log(&self, record: &Record) {
+ if !self.enabled(record.metadata()) {
+ return;
+ }
+
+ let jrb = unsafe { &mut JRB };
+ write!(
+ jrb,
+ "[{}] {} {} -- {}\r\n",
+ rtc::millis(),
+ record.level(),
+ record.target(),
+ record.args()
+ )
+ .ok();
+ }
+
+ fn flush(&self) {
+ // Unsafe due to mutable static. We can only deal with the
+ // tail position of the buffer here to keep things safe.
+ let jrb = unsafe { &mut JRB };
+ if jrb.lbr.is_empty() {
+ return;
+ }
+
+ let led = unsafe { &mut (*self.led.get()) };
+ let writer = unsafe { &mut (*self.writer.get()) };
+
+ led.set_high().ok();
+ while let Some(b) = jrb.lbr.shift() {
+ nb::block!(writer.w.write(b)).ok();
+ }
+ led.set_low().ok();
+ }
+}
+
+// Write to the UART right now, instead of putting it on a ring
+// buffer. This function is a huge hack, and only useful for debugging
+// either before the main loop starts or if the ring buffer is broken.
+pub unsafe fn write_fmt_now(args: fmt::Arguments, nl: bool) {
+ if UART0 == 0 {
+ return;
+ }
+ let uart: &mut UART0<Sercom0Pad3<Pa7<PfD>>, Sercom0Pad2<Pa6<PfD>>, (), ()> =
+ core::mem::transmute(UART0);
+ fmt::write(uart, args).expect("writing fmt now to uart");
+ if nl {
+ uart.write_str("\r\n").expect("writing nl now to uart");
+ }
+}
diff --git a/examples/simple/macros.rs b/examples/simple/macros.rs
new file mode 100644
index 0000000..46d2d07
--- /dev/null
+++ b/examples/simple/macros.rs
@@ -0,0 +1,15 @@
+#[macro_export]
+macro_rules! logln_now {
+ ($($arg:tt)*) => {
+ unsafe {crate::logger::write_fmt_now(format_args!($($arg)*), true);}
+ };
+ (_) => {};
+}
+
+#[macro_export]
+macro_rules! log_now {
+ ($($arg:tt)*) => {
+ unsafe {crate::logger::write_fmt_now(format_args!($($arg)*), false);}
+ };
+ (_) => {};
+}
diff --git a/examples/simple/main.rs b/examples/simple/main.rs
new file mode 100755
index 0000000..84b5e33
--- /dev/null
+++ b/examples/simple/main.rs
@@ -0,0 +1,192 @@
+#![no_std]
+#![no_main]
+#![feature(const_fn)]
+#![feature(const_transmute)]
+#![allow(dead_code)]
+
+mod logger;
+mod macros;
+mod rtc;
+
+use atsamd_usb_host::SAMDHost;
+use bootkbd::BootKeyboard;
+use clint::HandlerArray;
+use cortex_m::asm::wfi;
+use cortex_m_rt::{entry, exception, ExceptionFrame};
+use embedded_hal::digital::v2::OutputPin;
+use log::{debug, info, LevelFilter};
+use trinket_m0::{
+ self as hal,
+ clock::GenericClockController,
+ gpio::{OpenDrain, Output, Pa10, Pa6, Pa7, PfD},
+ sercom,
+ target_device::{interrupt, Interrupt},
+ time::*,
+ CorePeripherals, Peripherals,
+};
+use usb_host::Driver;
+
+static HANDLERS: HandlerArray = HandlerArray::new();
+
+static mut LED: usize = 0;
+
+#[entry]
+fn main() -> ! {
+ let mut peripherals = Peripherals::take().expect("taking peripherals");
+ let mut core = CorePeripherals::take().expect("taking core peripherals");
+
+ let mut clocks = GenericClockController::with_internal_32kosc(
+ peripherals.GCLK,
+ &mut peripherals.PM,
+ &mut peripherals.SYSCTRL,
+ &mut peripherals.NVMCTRL,
+ );
+
+ let mut pins = hal::Pins::new(peripherals.PORT);
+
+ let uart = hal::uart(
+ &mut clocks,
+ 115_200.hz(),
+ peripherals.SERCOM0,
+ &mut core.NVIC,
+ &mut peripherals.PM,
+ pins.d3,
+ pins.d4,
+ &mut pins.port,
+ );
+
+ let mut red_led = pins.d13.into_open_drain_output(&mut pins.port);
+ red_led.set_low().expect("turning off red LED");
+ unsafe { LED = core::mem::transmute(&red_led) }
+
+ // We do the transmute because, while all the underlying data is
+ // static, we're unable to get a referecence to the UART or LED
+ // until run-time. Another option would be to use Option in the
+ // SerialLogger definition, but that requires a check every time
+ // they might be used.
+ let uart_wrapped = logger::WriteWrapper::new(uart);
+ let logger = logger::SerialLogger::new(uart_wrapped, red_led);
+
+ // Wow, would I love to not be annotating this type.
+ let logger_ref: &'static logger::SerialLogger<
+ sercom::UART0<sercom::Sercom0Pad3<Pa7<PfD>>, sercom::Sercom0Pad2<Pa6<PfD>>, (), ()>,
+ Pa10<Output<OpenDrain>>,
+ > = unsafe { core::mem::transmute(&logger) };
+ unsafe { log::set_logger_racy(logger_ref).expect("couldn't set logger") };
+ log::set_max_level(LevelFilter::Info);
+
+ info!("setting up timer");
+ let mut rtc_handler = rtc::setup(peripherals.RTC, &mut clocks);
+
+ info!("setting up usb host");
+ let (mut usb_host, mut usb_handler) = SAMDHost::new(
+ peripherals.USB,
+ pins.usb_sof,
+ pins.usb_dm,
+ pins.usb_dp,
+ Some(pins.usb_host_enable),
+ &mut pins.port,
+ &mut clocks,
+ &mut peripherals.PM,
+ &rtc::millis,
+ );
+
+ let mut bootkbd = BootKeyboard::new();
+ let mut drivers: [&mut dyn Driver; 1] = [&mut bootkbd];
+
+ info!("setting up handlers");
+ HANDLERS.with_overrides(|hs| {
+ hs.register(0, &mut rtc_handler);
+ core.NVIC.enable(Interrupt::RTC);
+
+ hs.register(1, &mut usb_handler);
+ unsafe { core.NVIC.set_priority(Interrupt::USB, 0) };
+ core.NVIC.enable(Interrupt::USB);
+
+ info!("Boot up complete.");
+
+ loop {
+ usb_host.task(&mut drivers[..]);
+ wfi();
+ }
+ });
+ unreachable!();
+}
+
+#[panic_handler]
+fn panic_handler(pi: &core::panic::PanicInfo) -> ! {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ logln_now!("~~~ PANIC ~~~");
+ logln_now!("{}", pi);
+ logln_now!("flushing log");
+ loop {
+ log::logger().flush();
+ wfi()
+ }
+}
+
+#[exception]
+fn HardFault(ef: &ExceptionFrame) -> ! {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ log::logger().flush();
+ logln_now!("!!! Hard Fault - ef: {:?} !!!", ef);
+ logln_now!("flushing log");
+ loop {
+ log::logger().flush();
+ wfi()
+ }
+}
+
+#[exception]
+fn DefaultHandler(interrupt: i16) {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ debug!("*** Default Handler: {} ***", interrupt);
+}
+
+#[exception]
+fn NonMaskableInt() {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ debug!("+++ NonMaskableInt +++");
+}
+
+#[exception]
+fn SVCall() {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ debug!("+++ SVCall +++");
+}
+
+#[exception]
+fn PendSV() {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ debug!("+++ PendSV +++");
+}
+
+#[exception]
+fn SysTick() {
+ let red_led: &mut Pa10<Output<OpenDrain>> = unsafe { core::mem::transmute(LED) };
+ red_led.set_high().ok();
+
+ debug!("+++ SysTick +++");
+}
+
+#[interrupt]
+fn RTC() {
+ HANDLERS.call(0);
+}
+
+#[interrupt]
+fn USB() {
+ HANDLERS.call(1);
+}
diff --git a/examples/simple/rtc.rs b/examples/simple/rtc.rs
new file mode 100644
index 0000000..79e450a
--- /dev/null
+++ b/examples/simple/rtc.rs
@@ -0,0 +1,74 @@
+use core::sync::atomic::{AtomicUsize, Ordering};
+use log;
+use trinket_m0::{clock::GenericClockController, RTC};
+
+struct Clock(AtomicUsize);
+impl Clock {
+ const fn new() -> Self {
+ Self(AtomicUsize::new(0))
+ }
+
+ fn set(&self, millis: usize) {
+ self.0.store(millis, Ordering::SeqCst)
+ }
+
+ // Slightly less than 1ms, due to using a 32,768Hz clock, we can't
+ // hit exactly 1ms, so we shoot for a bit under.
+ fn millis(&self) -> usize {
+ self.0.load(Ordering::SeqCst)
+ }
+}
+
+static CLOCK: Clock = Clock::new();
+
+// Set to run every ~500µs.
+static COUNTER: u32 = 16; // 32 ticks requires 1024 cycles at 32,768Hz for 1 second.
+
+pub fn setup(mut rtc: RTC, clocks: &mut GenericClockController) -> impl FnMut() {
+ let rtc_clock = &clocks.gclk1();
+ clocks.rtc(&rtc_clock);
+
+ rtc.mode0().ctrl.write(|w| w.swrst().set_bit());
+ while rtc.mode0().status.read().syncbusy().bit_is_set() {}
+
+ rtc.mode0().ctrl.write(|w| {
+ w.mode().count32();
+
+ // Neither the prescaler nor matchlr values seem to work. Not
+ // sure why.
+ //w.prescaler().div1024();
+ w.matchclr().set_bit() // Reset on match for periodic
+ });
+
+ rtc.mode0().comp[0].write(|w| unsafe { w.bits(COUNTER) });
+ rtc.mode0().intflag.write(|w| w.cmp0().set_bit());
+ rtc.mode0().intenset.write(|w| w.cmp0().set_bit());
+
+ // Enable the RTC and wait for sync.
+ rtc.mode0().ctrl.write(|w| w.enable().set_bit());
+ while rtc.mode0().status.read().syncbusy().bit_is_set() {}
+
+ move || handler(&mut rtc)
+}
+
+pub fn millis() -> usize {
+ CLOCK.millis()
+}
+
+fn handler(rtc: &mut RTC) {
+ // FIXME: matchclr doesn't seem to work to reset the counter?
+ rtc.mode0().count.write(|w| unsafe { w.bits(0) });
+ rtc.mode0().intflag.write(|w| w.cmp0().set_bit());
+
+ static mut TICKS: usize = 0;
+ static mut ADD: bool = false;
+ unsafe {
+ if ADD {
+ TICKS += 1;
+ CLOCK.set(TICKS);
+ }
+ ADD = !ADD;
+
+ log::logger().flush();
+ }
+}