Initial bootstrap into ‘main’.

8 files changed, 160 insertions, 0 deletions

diff --git a/.cargo/config.toml b/.cargo/config.toml
new file mode 100644
index 0000000..f383523
--- /dev/null
+++ b/.cargo/config.toml
@@ -0,0 +1,10 @@
+[alias]
+t = "test --target x86_64-unknown-linux-gnu"
+xtask = "run --package xtask --"
+
+[build]
+target = "riscv32imac-unknown-none-elf"
+
+[target.riscv32imac-unknown-none-elf]
+rustflags = ["-C", "link-arg=-Tdevice.lds", "-C", "link-arg=-nostdlib"]
+linker = "riscv32-elf-ld"
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..ea8c4bf
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+/target
diff --git a/Cargo.lock b/Cargo.lock
new file mode 100644
index 0000000..60e46fa
--- /dev/null
+++ b/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "luchie"
+version = "0.1.0"
diff --git a/Cargo.toml b/Cargo.toml
new file mode 100644
index 0000000..9a0078f
--- /dev/null
+++ b/Cargo.toml
@@ -0,0 +1,24 @@
+[package]
+name = "luchie"
+version = "0.1.0"
+authors = ["Brian Cully <bjc@kublai.com>"]
+readme = "README.org"
+license = "GPL-3.0-only"
+repository = "https://git.spork.org/luchie.git"
+edition = "2021"
+
+[profile.dev]
+opt-level = 0
+lto = false
+
+[profile.release]
+opt-level = 3
+lto = true
+codegen-units = 1
+
+[dependencies]
+
+[[bin]]
+name = "luchie"
+test = false
+bench = false
\ No newline at end of file
diff --git a/README.org b/README.org
new file mode 100644
index 0000000..03c8939
--- /dev/null
+++ b/README.org
@@ -0,0 +1,15 @@
+looks like the start board is a gd32vf103cbt from the tiny print silk-screened on the chip.
+
+which means it has 128k flash and 32k sram and 37(!) gpio pins
+
+| area        | start       | end         |
+|-------------+-------------+-------------|
+| sram region | ~0x2000_0000~ | ~0x2001_7fff~ |
+| boot loader | ~0x1fff_b000~ | ~0x1fff_f7ff~ |
+| main flash  | ~0x0800_0000~ | ~0x0801_ffff~ |
+
+interrupt vector table is 4096 words starting from the start of flash (~mtvt~ register). ~_start~ should be at the end of the vector.
+
+according to the user manual (pg 51), at least when waking up, the system boots from ~0x0000_0000~ (which is an alias to the start of the main flash, iirc)
+
+usb is 2.0 full-speed (12Mbps)
diff --git a/device.lds b/device.lds
new file mode 100644
index 0000000..ec4729d
--- /dev/null
+++ b/device.lds
@@ -0,0 +1,54 @@
+OUTPUT_ARCH("riscv")
+
+ENTRY(_start)
+
+MEMORY
+{
+        /* 0x0000_0000 is an alias for 0x08000_0000 */
+        FLASH(rwx) : ORIGIN = 0x00000000, LENGTH = 128K
+        RAM(rw) : ORIGIN = 0x20000000, LENGTH = 32K
+}
+
+PHDRS
+{
+        text PT_LOAD;
+        bss PT_NULL;
+        rodata PT_LOAD;
+        data PT_LOAD;
+}
+
+SECTIONS
+{
+        .text : {
+                PROVIDE(_text_start = .);
+                *(.text.init) *(.text .text.*)
+                PROVIDE(_text_end = .);
+        } >FLASH AT>FLASH :text
+
+        PROVIDE(__global_pointer$ = . + 2048);
+
+        .rodata : {
+                PROVIDE(_rodata_start = .);
+                *(.rodata .rodata.*)
+                PROVIDE(_rodata_end = .);
+        } >FLASH AT>FLASH :rodata
+
+        . = ALIGN(4096);
+
+        .data : {
+                PROVIDE(_data_start = .);
+                *(.sdata .sdata.*) *(.data .data.*)
+                PROVIDE(_data_end = .);
+        } >RAM AT>RAM :data
+
+        .bss : {
+                PROVIDE(_bss_start = .);
+                *(.sbss .sbss.*) *(.bss .bss.*)
+                PROVIDE(_bss_end = .);
+        } >RAM AT>RAM :bss
+
+        . = ALIGN(2);
+        PROVIDE(_memory_start = ORIGIN(RAM));
+        PROVIDE(_memory_end = _memory_start + LENGTH(RAM));
+        PROVIDE(_stack_top = . + _memory_end);
+}
diff --git a/gdbinit b/gdbinit
new file mode 100644
index 0000000..695822f
--- /dev/null
+++ b/gdbinit
@@ -0,0 +1,11 @@
+define hook-quit
+  set confirm off
+end
+
+# print demangled symbols by default
+set print asm-demangle on
+
+# OpenOCD
+set remote hardware-breakpoint-limit 4
+set remote hardware-watchpoint-limit 2
+target extended-remote psyduck:3333
diff --git a/src/main.rs b/src/main.rs
new file mode 100755
index 0000000..0f77639
--- /dev/null
+++ b/src/main.rs
@@ -0,0 +1,38 @@
+#![feature(naked_functions)]
+
+#![no_std]
+#![no_main]
+
+use core::arch::asm;
+
+#[no_mangle]
+fn main(_hartid: usize) -> ! {
+    loop {}
+}
+
+#[naked]
+#[link_section = ".text.init"]
+#[export_name = "_start"]
+unsafe extern "C" fn _start() -> ! {
+    // At boot, the hart is in privilege mode M, mstatus fields MIE
+    // and MPRV are 0, the pc is set to a reset vector, the mcause
+    // register specifies why the reset occurred.
+    // c.f.: [^super::rism2] § 3.4 (Reset)
+    asm!(
+        ".option push",
+        ".option norelax",
+        "la gp, __global_pointer$",
+        ".option pop",
+
+        "csrr a0, mhartid",
+        "la sp, _stack_top",
+
+        "j main",
+        options(noreturn)
+    )
+}
+
+#[panic_handler]
+fn panic(_info: &core::panic::PanicInfo) -> ! {
+    loop {}
+}